Analysis, design and implementation of a PLL synthesizer for a C-Band to L-Band downconverterfor a CubeSat receiver system

Abstract

Nanosatellites and in particular CubeSats, have become popular since the concept inception in 2000 and first launched in 2003. A CubeSat must communicate and exchange various data with its ground control station during overpass. This paper focuses on a CubeSat downconverter Phase Locked Loop (PLL), in which presented in, is a brief literature review and analysis, from which a research gap was identified and a 4.385 GHz − 4.405 GHz frequency synthesizer was researched. This research article fundamental contribution is a simplistic workflow on designing a CubeSat downconverter PLL system, whereby a C-Band PLL was designed, implemented, tested and validated. The following paramount performance parameters at 1 MHz frequency offset from the 4.395 GHz carrier were recorded: i) out-band phase noise of -111 dBc/Hz, ii) output power of 4.52 dBm and iii) spurious response of -81.96 dBc/Hz.